Radio Frequency (RF) signals and components are employed in a variety of devices, including mobile communication devices such as mobile telephones. One type of commonly employed RF component is an RF attenuator, which is sometimes employed to control an RF signal level in a device that employs RF signals.
FIG. 1 illustrates a basic configuration of a series-shunt field effect transistor (FET) attenuator 100. Attenuator 100 includes an input port 105 and an output port 115. Attenuator 100 also includes a first series attenuation branch, or arm, including a first series field effect transistor 110, connected in series with a second series attenuation branch, or arm, including a second series field effect transistor 120, between input port 105 and output port 115 via an intermediate node 117. Also, a shunt attenuation branch, or arm including a shunt field effect transistor 130 is connected between intermediate node 117 and ground.
Attenuator 100 includes two attenuation control ports 125 and 135 which receive a series attenuation control signal Vg_series and a shunt attenuation control signal Vg_shunt, respectively. The series attenuation control signal Vg_series is applied to the gates of first and second series field effect transistors 110 and 120, and the shunt attenuation control signal Vg_shunt is applied to the gate of shunt series field effect transistor 130.
Effectively, first and second series field effect transistors 110 and 120 and shunt field effect transistor 130 are operated as voltage controlled impedances to attenuate an input signal, particularly an RF input signal, received at input port 105 and to provide the attenuated signal at output port 115. The voltages Vg_series and Vg_shunt are selected so that they operate in combination to provide a desired attenuation (e.g., X dB) while also maintaining desired input and output impedance values (e.g., 50Ω) within a desired tolerance.
Unfortunately, maintaining the relationship between Vg_series and Vg_shunt to satisfy these requirements can be complicated.
FIG. 2 shows a schematic diagram of an attenuator 200 that is designed to try to address this problem. Attenuator 200 includes an input port 205 and an output port 215. Attenuator 200 also includes a first series attenuation arm, including a first series field effect transistor 210, connected in series with a second series attenuation arm, including a second series field effect transistor 220, between input port 205 and output port 215 via an intermediate node 217. Also, a shunt attenuation arm including a shunt field effect transistor 230 is connected between intermediate node 217 and ground. Attenuator 200 includes one attenuation control port 225 which receive a series attenuation control signal Vg_series. Attenuator 200 also includes analog-to-digital converter (ADC) 240, look-up table 250, and digital-to-analog converter (DAC) 260.
In attenuator 200, for each attenuation value, X, there exists a value of the attenuation control signal voltage Vg_series(X), and a corresponding value for Vg_shunt(X), which together yield the desired attenuation X, while also maintaining the desired input and output impedances. When attenuator 200 is designed and constructed, for each desired attenuation value X the corresponding values of Vg_series(X) and Vg_shunt(X) are determined that also maintain the desired input/output impedances. Vg_series(X) and Vg_shunt(X) are each “digitized”—i.e., converted to digital words. The digital word for Vg_shunt(X) is then stored in look-up table 250 at an “address” corresponding a digital word for Vg_series(X).
In operation, when a particular attenuation value X is to be selected and applied by attenuator 200 to an input signal (e.g., an RF input signal), then the corresponding attenuation control signal voltage Vg_series(X) is applied to attenuation control port 225. Vg_series(X) is converted by ADC 240 to a digital address for addressing look-up table 250. Look-up table 250 then outputs a digital word representing the corresponding value for Vg_shunt(X). Finally, DAC 260 converts the digital word from look-up table 250 to produce the analog voltage Vg_shunt(X) which is then applied to shunt field effect transistor 230.
However, the attenuator 200 of FIG. 2 is complicated, requiring a number of additional circuits beyond the simple attenuator 100 of FIG. 1. Furthermore, attenuator 200 lacks provisions for addressing variations in the attenuator response due to process variations and temperature changes.
FIG. 3 shows a schematic diagram of another attenuator 300 that is also designed to try to address the issue of maintaining a proper relationship between Vg_series and Vg_shunt to achieve desired attenuation values and maintain the input and output impedances within a desired range. Attenuator 300 includes an input port 305 and an output port 315. Attenuator 300 also includes a first series attenuation branch, including a first series field effect transistor 310, connected in series with a second series attenuation branch, including a second series field effect transistor 320, between input port 305 and output port 315 via an intermediate node 317. Also, a shunt attenuation branch including a shunt field effect transistor 330 is connected between intermediate node 317 and ground. Attenuator 300 includes one attenuation control port 325 which receive a series attenuation control signal Vg_series.
Attenuator 300 also includes a “dummy attenuator” or “replica attenuator” 340. Replica attenuator 340 includes a first replica series attenuation branch, including a first replica series field effect transistor 360, connected in series with a second replica series attenuation branch, including a second replica series field effect transistor 370, between replica attenuator input load 304 and replica attenuator output load 314 via an intermediate node 367. Also, a replica shunt attenuation branch including a replica shunt field effect transistor 380 is connected between intermediate node 367 and ground.
Attenuator 300 further includes an operational amplifier 390 having a non-inverting input connected to a supply voltage 308 through a resistor divider comprising resistors 324 and 334. The inverting input of operational amplifier 390 is connected to the replica attenuator input load 304. Operational amplifier 390 can be integrated into the same chip as attenuator field effect transistors 310, 320 and 330, or it can be provided off-chip
Operationally, series attenuation control signal Vg_series is provided to control the series field effect transistors 310 and 320, and also to control the replica series field effect transistors 360 and 370. Through feedback operation with replica attenuator 340, operational amplifier 390 outputs a shunt attenuation control signal Vg_shunt to replica shunt field effect transistor 380 to maintain the input and output impedances of replica attenuator 340 to match the impedances of input and output loads 304 and 314. The same shunt attenuation control signal Vg_shunt output by operational amplifier 390 is coupled to shunt field effect transistor 330. By an appropriate selection of scaling for replica field effect transistors 360, 370 and 380 versus attenuator field effect transistors 310, 320 and 330, and for input and output loads 304 and 314 versus the source and load impedances for input and output ports 305 and 315, the operational amplifier 390 will output a value for shunt attenuation control signal Vg_shunt that will maintain the input and output impedances at attenuator 300 at the desired values.
However, attenuator 300 has some drawbacks, including the added size and complexity of replica attenuator 340 and operational amplifier 390.
What is needed, therefore, is a relatively uncomplicated attenuator. What is further needed is an attenuator with a single attenuator control voltage input terminal which is relatively compact and which is relatively insensitive to process and temperature variations.